MC68HC705JJ7 Datasheet, PDF (114/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Programmable Timer
TOF — Timer Overflow Flag
The TOF bit is automatically set when the 16-bit timer counter rolls over from $FFFF to $0000. Clear
the TOF bit by reading the timer status register with the TOF set and then accessing the low byte
(TMRL, $0019) of the timer registers. Resets have no effect on TOF.
11.8 Timer Operation during Wait Mode
During wait mode, the 16-bit timer continues to operate normally and may generate an interrupt to trigger
the MCU out of wait mode.
11.9 Timer Operation during Stop Mode
When the MCU enters stop mode, the free-running counter stops counting (the internal processor clock
is stopped). It remains at that particular count value until stop mode is exited by applying a low signal to
the IRQ/V_PP pin, at which time the counter resumes from its stopped value as if nothing had happened.
If stop mode is exited via an external reset (logic low applied to the RESET pin), the counter is forced to
$FFFC.
If a valid input capture edge occurs during stop mode, the input capture detect circuitry will be armed. This
action does not set any flags or wake up the MCU, but when the MCU does wake up there will be an active
input capture flag (and data) from the first valid edge. If the stop mode is exited by an external reset, no
input capture flag or data will be present even if a valid input capture edge was detected during stop mode.
11.10 Timer Operation during Halt Mode
When the MCU enters halt mode, the functions and states of the 16-bit programmable timer are the same
as for wait mode described in 11.8 Timer Operation during Wait Mode.
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
114
Freescale Semiconductor