MC68HC705JJ7 Datasheet, PDF (27/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

COP Register
2.7 COP Register
As shown in Figure 2-5, a register location is provided at $1FF0 to set the EPROM security⁽¹⁾, select the
optional features, and reset the COP watchdog timer. The OPT bit controls the function of the PB4 port
pin and the availability to add an offset to any measured analog voltages. See 8.4 Analog Status Register
for more information
Address: $1FF0
$1FF0 Bit 7
6
5
4
3
2
1
Read:
OPT
Write: EPMSEC
Reset:
= Unimplemented
Unaffected by reset
Figure 2-5. COP and Security Register (COPR)
Bit 0
COPC
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the EPROM/OTPROM
difficult for unauthorized users.
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
27