MC68HC705JJ7 Datasheet, PDF (24/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
Register
Bit 7
6
5
$000C
SIOP Data Register ^Read: _{Bit 7}
6
5
(SDR) Write:
See page 100. _Reset:
$000D
IRQ Status and Control Register ^Read: _IRQE
OM2
OM1
(ISCR) Write:
See page 38. _{Reset: 1}
1
0
$000E
PEPROM Bit Select Register ^Read:
(PEBSR) Write:
See page 116. _Reset:
PEB7
0
PEB6
0
PEB5
0
$000F
PEPROM Status and Control ^{Read: PEDATA}
0
PEPGM
Register (PESCR) Write:
See page 116. _{Reset: U}
0
0
$0010
Pulldown Register Port A ^Read:
and Port C⁽¹⁾ (PDRA) Write:
See page 56. _Reset:
PDICH
0
PDICL
0
PDIA5
0
$0011
Pulldown Register B ^Read:
(PDRB) Write:
See page 59. _Reset:
PDIB7
0
PDIB6
0
PDIB5
0
$0012
Timer Control Register ^Read: _ICIE
(TCR) Write:
See page 112. _{Reset: 0}
OCIE TOIE
0
0
$0013
Timer Status Register ^{Read: ICF}
(TSR) Write:
See page 113. _{Reset: U}
OCF
TOF
U
U
$0014
Input Capture Register High ^{Read: Bit 15}
14
13
(ICRH) Write:
See page 110. _Reset:
$0015
Input Capture Register Low ^{Read: Bit 7}
6
5
(ICRL) Write:
See page 110. _Reset:
$0016
Output Compare Register High ^Read: _{Bit 15}
14
13
(OCRH) Write:
See page 111. _Reset:
$0017
Output Compare Register Low ^Read: _{Bit 7}
6
5
(OCRL) Write:
See page 111. _Reset:
= Unimplemented
1. Features related to port C are only available on the 28-pin MC68HC705JP7 devices.
4
3
2
1
4
3
2
1
0
R
0
PEB4
0
0
0
IRQF
0
PEB3
0
0
R
0
0
0
PEB2
0
0
R
0
0
IRQR
U
PEB1
0
0
R
0
PDIA4
0
PDIA3
0
PDIA2
0
PDIA1
0
PDIB4
0
0
0
0
PDIB3
0
0
0
0
PDIB2
0
0
0
0
PDIB1
0
IEDG
U
0
0
0
0
0
12
11
10
9
Unaffected by reset
4
3
2
1
Unaffected by reset
12
11
10
9
Unaffected by reset
4
3
2
1
Unaffected by reset
R = Reserved
U = Unaffected
Bit 0
Bit 0
0
0
PEB0
0
PEPRZF
1
PDIA0
0
PDIB0
0
OLVL
0
0
0
Bit 8
Bit 0
Bit 8
Bit 0
Figure 2-3. Register Summary (Sheet 2 of 3)
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
24
Freescale Semiconductor