MC68HC705JJ7 Datasheet, PDF (58/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Parallel Input/Output
READ $0004
WRITE $0004
WRITE $0000
READ $0000
WRITE $0010
RESET
DATA DIRECTION
REGISTER A
R
BIT DDRAx
PORT A DATA
REGISTER
BIT PAx
EXTERNAL
INTERRUPT
REQUEST
(PA0:3)
PAx
HIGH SINK/SOURCE
CURRENT
CAPABILITY
PULLDOWN
REGISTER A
BIT PDIAx
R
PULLDOWN
DEVICE
MASK OPTION REG. ($1FF1)
Figure 7-4. Port A I/O Circuit
7.3 Port B
Port B is an 8-bit, general-purpose, bidirectional I/O port with these features:
• Programmable pulldown devices
• PB0–PB4 are shared with the analog subsystem.
• PB3 and PB4 are shared with the 16-bit programmable timer.
• PB4 can be driven directly by the output of comparator 1.
• PB5–PB7 are shared with the simple serial interface (SIOP).
• High current sinking capability on the PB4 pin
• High current sourcing capability on the PB4 pin
7.3.1 Port B Data Register
The port B data register (PORTB) contains a bit for each of the port B pins. When a port B pin is
programmed to be an output, the state of its data register bit determines the state of the output pin. When
a port B pin is programmed to be an input, reading the port B data register returns the logic state of the
pin. Reset has no effect on port B data.
Address: $0001
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Write:
Reset:
Unaffected by reset
Alternate: SCK
SDI
SDO
AN4
AN3
AN2
AN1
AN0
Alternate: SCK
SDI
SDO
TCMP TCAP
AN2
AN1
AN0
Alternate: SCK
SDI
SDO
CMP1 TCAP
AN2
AN1
AN0
Figure 7-5. Port B Data Register (PORTB)
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
58
Freescale Semiconductor