MC68HC705JJ7 Datasheet, PDF (116/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Personality EPROM (PEPROM)
12.2 PEPROM Registers
Two I/O registers control programming and reading of the PEPROM:
• The PEPROM bit select register (PEBSR)
• The PEPROM status and control register (PESCR)
12.2.1 PEPROM Bit Select Register
The PEPROM bit select register (PEBSR) selects one of 64 bits in the PEPROM array. Reset clears all
the bits in the PEPROM bit select register.
Address:
Read:
Write:
Reset:
$000E
Bit 7
PEB7
0
6
PEB6
0
5
PEB5
0
4
PEB4
0
3
PEB3
0
2
PEB2
0
1
PEB1
0
Bit 0
PEB0
0
Figure 12-2. PEPROM Bit Select Register (PEBSR)
PEB7 and PEB6 — Not connected to the PEPROM array
These read/write bits are available as storage locations. Reset clears PEB7 and PEB6.
PEB5–PEB0 — PEPROM Bit Selects
These read/write bits select one of 64 bits in the PEPROM as shown in Table 12-1. Bits PEB2–0 select
the PEPROM row, and bits PEB5–PEB3 select the PEPROM column. Reset clears PEB5–PEB0,
selecting the PEPROM bit in row zero, column zero.
12.2.2 PEPROM Status and Control Register
The PEPROM status and control register (PESCR) controls the PEPROM programming voltage. This
register also transfers the PEPROM bits to the internal data bus and contains a flag bit when row zero is
selected.
Address: $000F
Bit 7
6
5
4
3
2
1
Bit 0
Read: PEDATA
0
0
0
0
0
PEPRZF
PEPGM
Write:
R
R
R
Reset:
U
0
0
0
0
0
0
1
= Unimplemented
R
= Reserved
U = Unaffected
Figure 12-3. PEPROM Status and Control Register (PESCR)
PEDATA — PEPROM Data Bit
This read-only bit is the output state of the PEPROM sense amplifier and shows the state of the
currently selected bit. The state of the PEDATA bit does not affect the programming of the bit selected
by the PEBSR. Reset does not affect the PEDATA bit.
1 = PEPROM data is a logic 1.
0 = PEPROM data is a logic 0.
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
116
Freescale Semiconductor