MC68HC705JJ7 Datasheet, PDF (81/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

A/D Conversion Methods
CMP1
This read-only bit shows the state of comparator 1 during the time that the bit is read. This bit is
therefore the current state of the comparator without any latched history. The CMP1 bit will be high if
the voltage on the PB2/AN2 pin is greater than the voltage on the PB3/AN3/TCAP pin, regardless of
the state of the INV bit in the AMUX register. Since a reset disables comparator 1, this bit returns a
logic 0 following a reset of the device.
1 = The voltage on the positive input on comparator 1 is higher than the voltage on the negative
input of comparator 1.
0 = The voltage on the positive input on comparator 1 is lower than the voltage on the negative input
of comparator 1.
8.5 A/D Conversion Methods
The control bits in the ACR provide various options to charge or discharge current through the PB0/AN0
pin to perform single-slope A/D conversions using an external capacitor from the PB0/AN0 pin to V_SS as
shown in Figure 8-7. The various A/D conversion triggering options are given in Table 8-3.
Charge Time = ^{C x VX}
I
V_DD –1.5 Vdc
VOLTAGE ON
CAPACITOR
CONNECTED
TO (+) INPUT
CHARGE TIME
TO MATCH UNKNOWN
MAXIMUM CHARGE TIME
TO V_DD –1.5 Vdc
UNKNOWN
OR REFERENCE
SIGNALS
RAMP
CAP
PB4/AN4
PB3/AN3
PB2/AN2
PB1/AN1
PB0/AN0
UNKNOWN VOLTAGE ON (–) INPUT
DISCHARGE TIME
TO RESET CAPACITOR
+5V
V_DD
MC68HC705JJ7
MC68HC705JP7
V_SS
Figure 8-7. Single-Slope A/D Conversion Method
The top three bits of the ACR control the charging and discharging current into or out of the PB0/AN0 pin.
These three bits will have no effect on the PB0/AN0 pin if the ISEN enable bit is cleared. Any clearing of
the ISEN bit will immediately disable both the charge current source and the discharge device. Since all
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
81