MC68HC705JJ7 Datasheet, PDF (88/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog Subsystem
V_CAP
V_X
t_DIS
t_DIS
(MIN)
t_DIS
(MIN)
V_MAX
t_CHG
V_X = ^{tCHG x ICHG}
C_EXT
CHG
COMP2
(TCAP)
TOF
OCF
ICF
0
1
2
31
2
Point
0
1
2
3
Action
Software/Hardware Action
Dependent Variable(s)
Begin initial discharge and select mode 3 by
clearing CHG and setting ATD2 and ATD1 in
the ACR. Also set ICEN bit in ACR and IEDG
bit in TCR.
Software write
Software
V_CAP falls to V_SS. Set timer output compare
registers (OCRH and OCRL) to desired
charge start time.
Wait out minimum t_DIS time.
Software write to OCRH, OCRL
V_MAX, I_DIS, C_EXT, software
Stop discharge and begin charge when the
next OCF sets the CHG control bit in ACR.
Timer OCF sets the CHG control bit
in the ACR.
Free-running timer
output compare, f_OSC
V_CAP rises to V_X and comparator 2 output
trips, setting CPF2 and CMP2, which causes
an ICF from the timer and clears the CHG
control bit in ACR. Must clear CPF2 to trap
next CPF2 flag. Load next OCF.
Wait out t_CHG time.
Timer ICF clears the CHG control bit
in the ACR.
V_X, I_CHG, C_EXT
Figure 8-11. A/D Conversion — OCF/ICF Control (Mode 3)
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
88
Freescale Semiconductor