MC68HC705JJ7 Datasheet, PDF (73/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog Multiplex Register
8.2 Analog Multiplex Register
The analog multiplex register (AMUX) controls the general interconnection and operation. The control bits
in the AMUX are shown in Figure 8-2.
Address:
Read:
Write:
Reset:
$0003
Bit 7
6
5
4
3
2
1
HOLD DHOLD
INV
VREF MUX4 MUX3 MUX2
1
0
0
0
0
0
0
Figure 8-2. Analog Multiplex Register (AMUX)
Bit 0
MUX1
0
HOLD, DHOLD
These read/write bits control the source connection to the negative input of voltage comparator 2
shown in Figure 8-3. This allows the voltage on the internal temperature sensing diode, the channel
selection bus, or the divide-by-two channel selection bus to charge the internal sample capacitor and
to also be presented to comparator 2. The decoding of these sources is given in Table 8-1.
During the hold case when both the HOLD and DHOLD bits are clear, the VOFF bit in the analog status
register (ASR) can offset the V_SS reference on the sample capacitor by approximately 100 mV. This
offset source is bypassed whenever the sample capacitor is being charged with either the HOLD or
DHOLD bit set. The VOFF bit must be enabled by the OPT bit in the COPR at location $1FF0.
V_DD
INTERNAL
TEMPERATURE
DIODE
CHANNEL
SELECTION
BUS
PB0 ₊
COMP2
–
80 kΩ
80 kΩ
SAMPLE
CAP
V_SS
OFFSET
V_OFF
OPT (MOR)
HOLD
DHOLD
Figure 8-3. Comparator 2 Input Circuit
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
73