MC68HC705JJ7 Datasheet, PDF (49/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6
Operating Modes
6.1 Introduction
This section describes the operation of the device with respect to the oscillator source and the low-power
modes:
• Stop mode
• Wait mode
• Halt mode
• Data-retention mode
6.2 Oscillator Source
The microcontroller unit (MCU) can be clocked by either an internal low-power oscillator (LPO) without
external components or by an external pin oscillator (EPO) which uses external components. The enable
and selection of the clock source is determined by the state of the oscillator select bits (OM1 and OM2)
in the interrupt status and control register (ISCR) as shown in Figure 6-1.
Address: $000D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
IRQF
0
0
0
IRQE
OM2
OM1
Write:
R
IRQR
Reset:
1
1
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 6-1. IRQ Status and Control Register (ISCR)
IRQE — External Interrupt Request Enable Bit
This read/write bit enables external interrupts. Refer to Chapter 4 Interrupts for more details.
OM1 and OM2 — Oscillator Select Bits
These bits control the selection and enabling of the oscillator source for the MCU. One choice is the
internal LPO and the other oscillator is the EPO which is common to most M68HC05 MCU devices.
The EPO uses external components like filter capacitors and a crystal or ceramic resonator and
consumes more power than the LPO. The selection and enable conditions for these two oscillators are
shown in Table 6-1. Reset clears OM1 and sets OM2, which selects the LPO and disables the EPO.
Therefore, the lowest power is consumed when OM1 is cleared. The state with both OM1 and OM2
set is provided so that the EPO can be started up and allowed to stabilize while the LPO still clocks the
MCU.
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
49