MC68HC705JJ7 Datasheet, PDF (26/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
2.4 User and Interrupt Vector Mapping
The interrupt vectors are contained in the upper memory addresses above $1FF0 as shown in Figure 2-4.
Address
$1FF0
$1FF1
$1FF2
$1FF3
$1FF4
$1FF5
$1FF6
$1FF7
$1FF8
$1FF9
$1FFA
$1FFB
$1FFC
$1FFD
$1FFE
$1FFF
Register Name
COP Register and EPROM Security
Mask Option Register
Analog Interrupt Vector (MSB)
Analog Interrupt Vector (LSB)
Serial Interrupt Vector (MSB)
Serial Interrupt Vector ((LSB)
Timer Interrupt Vector (MSB)
Timer Interrupt Vector (LSB)
Core Timer Interrupt Vector (MSB)
Core Timer Interrupt Vector (LSB)
External IRQ Vector (MSB)
External IRQ Vector (LSB)
SWI Vector (MSB)
SWI Vector (LSB)
Reset Vector (MSB)
Reset Vector (LSB)
Figure 2-4. Vector Mapping
2.5 Random-Access Memory (RAM)
The 224 addresses from $0020 to $00FF serve as both the user RAM and the stack RAM. The central
processor unit (CPU) uses five RAM bytes to save all CPU register contents before processing an
interrupt. During a subroutine call, the CPU uses two bytes to store the return address. The stack pointer
decrements during pushes and increments during pulls.
NOTE
Be careful when using nested subroutines or multiple interrupt levels. The
CPU may overwrite data in the RAM during a subroutine or during the
interrupt stacking operation.
2.6 Erasable Programmable Read-Only Memory (EPROM)
The EPROM is located in three areas of the memory map:
• Addresses $0700–$1EFF contain 6144 bytes of user EPROM.
• Addresses $1FF0–$1FF1 contain 2 bytes of EPROM reserved for user vectors and COP and
security register (COPR), and the mask option register. Only bit 7 of $1FF0 is a programmable bit.
• Addresses $1FF2–$1FFF contain 14 bytes of interrupt vectors.
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
26
Freescale Semiconductor