MC68HC705JJ7 Datasheet, PDF (134/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Instruction Set
Source
Form
JSR opr
JSR opr
JSR opr,X
JSR opr,X
JSR ,X
LDA #opr
LDA opr
LDA opr
LDA opr,X
LDA opr,X
LDA ,X
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSR opr
LSRA
LSRX
LSR opr,X
LSR ,X
MUL
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NOP
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
Table 14-6. Instruction Set Summary (Sheet 4 of 6)
Operation
Jump to Subroutine
Load Accumulator with
Memory Byte
Load Index Register
with Memory Byte
Logical Shift Left
(Same as ASL)
Logical Shift Right
Unsigned Multiply
Negate Byte
(Two’s Complement)
No Operation
Logical OR
Accumulator with
Memory
Rotate Byte Left
through Carry Bit
Description
PC ← (PC) + n (n = 1, 2, or 3)
Push (PCL); SP ← (SP) – 1
Push (PCH); SP ← (SP) – 1
PC ← Conditional Address
A ← (M)
X ← (M)
C
b7
0
b0
0
b7
C
b0
X : A ← (X) × (A)
M ← –(M) = $00 – (M)
A ← –(A) = $00 – (A)
X ← –(X) = $00 – (X)
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
A ← (A) ∨ (M)
C
b7
b0
Effect
on CCR
H I NZC
DIR BD dd 5
EXT CD hh ll 6
— — — — — IX2 DD ee ff 7
IX1 ED ff 6
IX FD
5
IMM A6 ii 2
DIR B6 dd 3
——   —
EXT
IX2
C6 hh ll
D6 ee ff
4
5
IX1 E6 ff 4
IX F6
3
IMM AE ii 2
DIR BE dd 3
——   —
EXT
IX2
CE hh ll
DE ee ff
4
5
IX1 EE ff 4
IX FE
3
DIR 38 dd 5
INH 48
3
— —   ⋅ INH 58
3
IX1 68 ff 6
IX 78
5
DIR 34 dd 5
INH 44
3
— — 0   INH 54
3
IX1 64 ff 6
IX 74
5
0 — — — 0 INH 42
11
DIR 30 ii 5
INH 40
3
— —    INH 50
3
IX1 60 ff 6
IX 70
5
— — — — — INH 9D
2
IMM AA ii 2
DIR BA dd 3
——   —
EXT
IX2
CA hh ll
DA ee ff
4
5
IX1 EA ff 4
IX FA
3
DIR 39 dd 5
INH 49
3
— —    INH 59
3
IX1 69 ff 6
IX 79
5
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
134
Freescale Semiconductor