MC9S12E128CFUE Datasheet, PDF (595/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

Appendix A Electrical Characteristics
A.7 DAC Characteristics
This section describes the characteristics of the digital to analog converter.
A.7.1 DAC Operating Characteristics
Table A-24. DAC Electrical Characteristics (Operating)
Num C
Characteristic
1 D DAC Supply
2 D DAC Supply Current
D
3 D Reference Potential
D
4 D Reference Supply Current
5 D Input Current, Channel Off¹
6 D Operating Temperature Range
Condition Symbol
Min
Typ
V_DDA
3.135
—
Running
I_DDArun
—
—
Stop
I_DDstop
—
—
(low power)
Low
V_SSA
V_SSA
—
High
V_REF
V_DDA/2
—
V_REF to V_SSA
I_REF
—
—
I_OFF
–200
—
T
–40
—
Max
5.5
3.5
1.0
V_SSA
V_DDA
400
1
125
Unit
V
mA
mA
V
V
mA
µA
°_C
Num
1
2
3
4
5
6
7
Table A-25. DAC Timing/Performance Characteristics
C
Parameters
D DAC Operating Frequency
D Integral Non-Linearity
D Differential Non-Linearity
D Resolution
D Settling Time
P Absolute Accuracy
D Offset Error
Symbol
Min
f_BUS
—
INL
—
DNL
—
RES
—
T_S
5
ABS_ACC
–1
ERR
—
Typ
—
0.25
0.10
—
—
—
+/-2.5
Max
Unit
25
MHz
—
Count
—
Count
8
Bit
10
µs
1
Count
—
mV
A.8 External Bus Timing
A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing values
shown on table Table A-26 and Table A-27. All major bus signals are included in the diagram. While both
a data write and data read cycle are shown, only one or the other would occur on a particular bus cycle.
The expanded bus timings are highly dependent on the load conditions. The timing parameters shown
assume a balanced load across all outputs.
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
595