MC9S12E128CFUE Datasheet, PDF (377/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
When the PWMEN bit is cleared:
• The PWMx outputs will be tri-stated unless OUTCTLx = 1
• The PWM counter is cleared and does not count
• The PWM generator forces its outputs to zero
• The PWMRF flag and pending CPU interrupt requests are not cleared
• All fault circuitry remains active unless FPINEx = 0
• Software output control remains active
• Deadtime insertion continues during software output control
11.4.8 Fault Protection
Fault protection can disable any combination of PWM pins. Faults are generated by a logic one on any of
the FAULT pins. Each FAULT pin can be mapped arbitrarily to any of the PWM pins.
When fault protection hardware disables PWM pins, the PWM generator continues to run, only the output
pins are deactivated.
The fault decoder disables PWM pins selected by the fault logic and the disable mapping register. See
Figure 11-15. Each bank of four bits in the disable mapping register control the mapping for a single PWM
pin. Refer to Table 11-12.
The fault protection is enabled even when the PWM is not enabled; therefore, a fault will be latched in and
will be cleared in order to prevent an interrupt when the PWM is enabled.
11.4.8.1 Fault Pin Sample Filter
Each fault pin has a sample filter to test for fault conditions. After every bus cycle setting the FAULTx pin
at logic zero, the filter synchronously samples the pin once every four bus cycles. QSMP determines the
number of consecutive samples that must be logic one for a fault to be detected. When a fault is detected,
the corresponding FAULTx pin flag, FFLAGx, is set. Clear FFLAGx by writing a logic one to it.
If the FIEx, FAULTx pin interrupt enable bit is set, the FFLAGx flag generates a CPU interrupt request.
The interrupt request latch remains set until:
• Software clears the FFLAGx flag by writing a logic one to it
• Software clears the FIEx bit by writing a logic zero to it
• A reset occurs
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
377