MC9S12E128CFUE Datasheet, PDF (454/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

Chapter 15 Background Debug Module (BDMV4)
PLLSEL
1
1
CLKSW
0
1
Table 15-3. BDM Clock Sources
BDMCLK
Alternate clock (refer to the device overview chapter to determine the alternate clock
source)
Bus clock dependent on the PLL
MC9S12E128 Data Sheet, Rev. 1.07
454
Freescale Semiconductor