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| MC9S12E128CFUE Datasheet, PDF (547/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet | |||
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Chapter 19 Module Mapping Control (MMCV4)
Write: Once in normal and emulation modes, anytime in special modes
NOTE
Writes to this register take one cycle to go into effect.
This register initializes the position of the internal RAM within the on-chip system memory map.
Table 19-2. INITRM Field Descriptions
Field
Description
7:3
Internal RAM Map Position â These bits determine the upper ï¬ve bits of the base address for the systemâs
RAM[15:11] internal RAM array.
0
RAMHAL
RAM High-Align â RAMHAL speciï¬es the alignment of the internal RAM array.
0 Aligns the RAM to the lowest address (0x0000) of the mappable space
1 Aligns the RAM to the higher address (0xFFFF) of the mappable space
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
547
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