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MC9S12E128CFUE Datasheet, PDF (373/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet
11.4.7
Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
PWM Generator Loading
11.4.7.1 Load Enable
The load okay bit, LDOK, enables loading the PWM generator with:
• A prescaler divisor—from the PRSC1 and PRSC0 bits in PWM control register
• A PWM period—from the PWM counter modulus registers
• A PWM pulse width—from the PWM value registers
LDOK prevents reloading of these PWM parameters before software is finished calculating them Setting
LDOK allows the prescaler bits, PMFMOD and PMFVALx registers to be loaded into a set of buffers. The
loaded buffers use the PWM generator at the beginning of the next PWM reload cycle. Set LDOK by
reading it when it is a logic zero and then writing a logic one to it. After loading, LDOK is automatically
cleared.
11.4.7.2 Load Frequency
The LDFQ3, LDFQ2, LDFQ1, and LDFQ0 bits in the PWM control register (PWMCTL) select an integral
loading frequency of one to 16-PWM reload opportunities. The LDFQ bits take effect at every PWM
reload opportunity, regardless the state of the load okay bit, LDOK. The half bit in the PWMCTL register
controls half-cycle reloads for center-aligned PWMs. If the half bit is set, a reload opportunity occurs at
the beginning of every PWM cycle and half cycle when the count equals the modulus. If the half bit is not
set, a reload opportunity occurs only at the beginning of every cycle. Reload opportunities can only occur
at the beginning of a PWM cycle in edge-aligned mode.
NOTE
Loading a new modulus on a half cycle will force the count to the new
modulus value minus one on the next clock cycle. Half cycle reloads are
possible only in center-aligned mode. Enabling or disabling half-cycle
reloads in edge-aligned mode will have no effect on the reload rate.
UP/DOWN
COUNTER
RELOAD
CHANGE
RELOAD
FREQUENCY
TO EVERY
TWO OPPORTUNITIES
TO EVERY
FOUR OPPORTUNITIES
Figure 11-65. Full Cycle Reload Frequency Change
TO EVERY
OPPORTUNITY
UP/DOWN
COUNTER
RELOAD
CHANGE
RELOAD
FREQUENCY
TO EVERY
TO EVERY
TO EVERY
TO EVERY
TWO OPPORTUNITIES FOUR OPPORTUNITIES OPPORTUNITY TWO OPPORTUNITIES
Figure 11-66. Half Cycle Reload Frequency Change
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
373