MC9S12E128CFUE Datasheet, PDF (587/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

Appendix A Electrical Characteristics
A.5.2 Slave Mode
In Figure A-6 the timing diagram for slave mode with transmission format CPHA = 0 is depicted.
SS
(INPUT)
SCK
(CPOL = 0)
(INPUT)
2
SCK
(CPOL = 1)
(INPUT) ¹⁰
1
12
4
4
12
7
9
MISO
(OUTPUT)
see
note
SLAVE MSB ^{BIT 6 . . . 1}
13 3
13
11
11
SLAVE LSB OUT
8
SEE
NOTE
MOSI
(INPUT)
5
6
MSB IN
BIT 6 . . . 1
LSB IN
NOTE: Not defined!
Figure A-6. SPI Slave Timing (CPHA = 0)
In Figure A-7 the timing diagram for slave mode with transmission format CPHA = 1 is depicted.
SS
(INPUT)
SCK
(CPOL = 0)
(INPUT)
SCK
(CPOL = 1)
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
1
2
12
4
4
12
9
see
note
SLAVE
MSB OUT
7
5
6
MSB IN
11
BIT 6 . . . 1
BIT 6 . . . 1
3
13
13
8
SLAVE LSB OUT
LSB IN
NOTE: Not defined!
Figure A-7. SPI Slave Timing (CPHA = 1)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
587