MC9S12E128CFUE Datasheet, PDF (361/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.4.4 Independent or Complementary Channel Operation
Writing a logic one to a INDEPx bit configures a pair of the PWM outputs as two independent PWM
channels. Each PWM output has its own PWM value register operating independently of the other
channels in independent channel operation.
Writing a logic zero to a INDEPx bit configures the PWM output as a pair of complementary channels.
The PWM pins are paired as shown in Figure 11-47 in complementary channel operation.
PAIR A
PMFVAL0 PMFVAL1
REGISTER REGISTER
PWM CHANNELS 0 AND 1
TOP
BOTTOM
PAIR B
PMFVAL2 PMFVAL3
REGISTER REGISTER
PWM CHANNELS 2 AND 3
TOP
BOTTOM
PAIR C
PMFVAL4 PMFVAL5
REGISTER REGISTER
PWM CHANNELS 4 AND 5
TOP
BOTTOM
Figure 11-47. Complementary Channel Pairs
The complementary channel operation is for driving top and bottom transistors in a motor drive circuit,
such as the one in Figure 11-48.
AC
INPUTS
PWM
0
PWM
2
PWM
4
PWM
1
PWM
3
PWM
5
Figure 11-48. Typical 3 Phase AC Motor Drive
TO
MOTOR
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
361