MC9S12E128CFUE Datasheet, PDF (157/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

3.3.7.4
Chapter 3 Port Integration Module (PIM9E128V1)
Port U Reduced Drive Register (RDRU)
R
W
Reset
7
RDRU7
0
6
RDRU6
5
RDRU5
4
RDRU4
3
RDRU3
2
RDRU2
0
0
0
0
0
Figure 3-45. Port U Reduced Drive Register (RDRU)
1
RDRU1
0
0
RDRU0
0
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Table 3-32. RDRT Field Descriptions
Field
Description
7:0
Reduced Drive Port U
RDRU[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
3.3.7.5 Port U Pull Device Enable Register (PERU)
7
R
PERU7
W
6
PERU6
5
PERU5
4
PERU4
3
PERU3
2
PERU2
1
PERU1
0
PERU0
Reset
0
0
0
0
0
0
0
0
Figure 3-46. Port T Pull Device Enable Register (PERT)
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
Table 3-33. PERT Field Descriptions
Field
7:0
Pull Device Enable Port U
PERU[7:0] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
157