MC9S12E128CFUE Datasheet, PDF (370/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
UP/DOWN COUNTER
MODULUS = 4
UP COUNTER
MODULUS = 4
PWM = 0
CENTER-ALIGNED ^{PWM = 1}
POSITIVE POLARITY
PWM = 2
PWM = 3
PWM = 4
PWM = 0
PWM = 1
EDGE-ALIGNED
POSITIVE POLARITY
PWM
=
2
PWM = 3
PWM = 4
UP/DOWN COUNTER
MODULUS = 4
UP COUNTER
MODULUS = 4
PWM = 0
PWM = 1
CENTER-ALIGNED
NEGATIVE POLARITY
PWM = 2
PWM = 3
PWM = 4
PWM = 0
PWM = 1
EDGE-ALIGNED
NEGATIVE POLARITY
PWM
=
2
PWM = 3
PWM = 4
Figure 11-61. PWM Polarity
11.4.6 Software Output Control
Setting output control enable bit, OUTCTLx, enables software to drive the PWM outputs rather than the
PWM generator. In an independent mode, with OUTCTLx = 1, the output bit OUTx, controls the PWMx
channel. In a complementary channel operation the even OUTCTL bit is used to enable software output
control for the pair. But the OUTCTL bits must be switched in pairs for proper operation. The OUTCTLx
and OUTx bits are in the PWM output control register.
NOTE
During software output control, TOPNEG and BOTNEG still control output
polarity. It will take upto 3 clock cycles to see the effect of output control on
the PWM output pins.
In independent PWM operation, setting or clearing the OUTx bit activates or deactivates the PWMx
output.
In complementary channel operation, the even-numbered OUTx bits replace the PWM generator outputs
as inputs to the deadtime generators. Complementary channel pairs still cannot be active simultaneously,
and the deadtime generators continue to insert deadtime in both channels of that pair, whenever an even
OUTx bit toggles. Even OUTx bits control the top PWM signals while the odd OUTx bits control the
bottom PWM signals with respect to the even OUTx bits. Setting the odd OUTx bit makes its
corresponding PWMx the complement of its even pair, while clearing the odd OUTx bit deactivates the
odd PWMx.
MC9S12E128 Data Sheet, Rev. 1.07
370
Freescale Semiconductor