MC9S12E128CFUE Datasheet, PDF (423/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

13.3.2.3 Output Compare 7 Mask Register (OC7M)
Chapter 13 Timer Module (TIM16B4CV1)
7
6
5
4
3
2
1
0
R
0
0
0
0
OC7M7
OC7M6
OC7M5
OC7M4
W
Reset
0
0
0
0
0
0
0
0
Figure 13-8. Output Compare 7 Mask Register (OC7M)
Read: Anytime
Write: Anytime
Table 13-4. OC7M Field Descriptions
Field
Description
7:4
OC7M[7:4]
Output Compare 7 Mask — Setting the OC7Mx (x ranges from 4 to 6) will set the corresponding port to be an
output port when the corresponding TIOSx (x ranges from 4 to 6) bit is set to be an output compare.
Note: A successful channel 7 output compare overrides any channel 6:4 compares. For each OC7M bit that is
set, the output compare action reflects the corresponding OC7D bit.
13.3.2.4 Output Compare 7 Data Register (OC7D)
7
6
5
4
3
2
1
0
R
0
0
0
0
OC7D7
OC7D6
OC7D5
OC7D4
W
Reset
0
0
0
0
0
0
0
0
Figure 13-9. Output Compare 7 Data Register (OC7D)
Read: Anytime
Write: Anytime
Table 13-5. OC7D Field Descriptions
Field
Description
7:4
Output Compare 7 Data — A channel 7 output compare can cause bits in the output compare 7 data register
OC7D[7:4] to transfer to the timer port data register depending on the output compare 7 mask register.
13.3.2.5 Timer Count Register (TCNT)
R
W
Reset
15
TCNT15
0
14
TCNT14
13
TCNT13
12
TCNT12
11
TCNT11
10
TCNT10
0
0
0
0
0
Figure 13-10. Timer Count Register High (TCNTH)
9
TCNT9
0
9
TCNT8
0
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
423