MC9S12E128CFUE Datasheet, PDF (115/606 Pages) Freescale Semiconductor, Inc – MC9S12E128 Data Sheet

2.4.1.4 Illegal Flash Operations
Chapter 2 128 Kbyte Flash Module (FTS128K1V1)
2.4.1.4.1 Access Error
The ACCERR flag in the FSTAT register will be set during the command write sequence if any of the
following illegal Flash operations are performed causing the command write sequence to immediately
abort:
1. Writing to the Flash address space before initializing the FCLKDIV register
2. Writing a misaligned word or a byte to the valid Flash address space
3. Writing to the Flash address space while CBEIF is not set
4. Writing a second word to the Flash address space before executing a program or erase command
on the previously written word
5. Writing to any Flash register other than FCMD after writing a word to the Flash address space
6. Writing a second command to the FCMD register before executing the previously written
command
7. Writing an invalid command to the FCMD register
8. Writing to any Flash register other than FSTAT (to clear CBEIF) after writing to the FCMD register
9. The part enters stop mode and a program or erase command is in progress. The command is aborted
and any pending command is killed
10. When security is enabled, a command other than mass erase originating from a non-secure memory
or from the background debug mode is written to the FCMD register
11. A 0 is written to the CBEIF bit in the FSTAT register to abort a command write sequence.
The ACCERR flag will not be set if any Flash register is read during the command write sequence. If the
Flash array is read during execution of an algorithm (CCIF=0), the Flash module will return invalid data
and the ACCERR flag will not be set. If an ACCERR flag is set in the FSTAT register, the Flash command
controller is locked. It is not possible to launch another command until the ACCERR flag is cleared.
2.4.1.4.2 Protection Violation
The PVIOL flag in the FSTAT register will be set during the command write sequence after the word write
to the Flash address space if any of the following illegal Flash operations are performed, causing the
command write sequence to immediately abort:
1. Writing a Flash address to program in a protected area of the Flash array (see Section 2.3.2.5).
2. Writing a Flash address to erase in a protected area of the Flash array.
3. Writing the mass erase command to the FCMD register while any protection is enabled.
If the PVIOL flag is set, the Flash command controller is locked. It is not possible to launch another
command until the PVIOL flag is cleared.
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
115