MC68HC908GP32_08 Datasheet, PDF (59/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

I/O Registers
ADICLK — ADC Input Clock Select Bit
ADICLK selects either the bus clock or CGMXCLK as the input clock source to generate the internal
ADC clock. Reset selects CGMXCLK as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz, CGMXCLK can be used as the
clock source for the ADC. If CGMXCLK is less than 1 MHz, use the PLL-generated bus clock as the
clock source. As long as the internal ADC clock is at approximately 1 MHz, correct operation can be
guaranteed.
1 = Internal bus clock
0 = External clock (CGMXCLK)
-^A----^D-----^C-----_A-i--n--_D-p---_I^u--_V--t---c2---l-–o---_A-c---k-_D---f-_I-r--_V^{e---q--0--u---e---n----c---y-} = 1MHz
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor
59