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MC68HC908GP32_08 Datasheet, PDF (142/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Serial Communications Interface Module (SCI)
Fast Data Tolerance
Figure 13-8 shows how much a fast received character can be misaligned without causing a noise error
or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit data
samples at RT8, RT9, and RT10.
RECEIVER
RT CLOCK
STOP
IDLE OR NEXT CHARACTER
DATA
SAMPLES
Figure 13-8. Fast Data
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in Figure 13-8, the receiver counts 154 RT cycles at the point when
the count of the transmitting device is
10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
1----5---4--1---5–---4--1---6---0-- × 100 = 3.9˙0%
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in Figure 13-8, the receiver counts 170 RT cycles at the point when
the count of the transmitting device is
11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 9-bit
character with no errors is
1----7---0--1---7–---0--1---7---6-- × 100 = 3.53%
13.4.3.6 Receiver Wakeup
So that the MCU can ignore transmissions intended only for other receivers in multiple-receiver systems,
the receiver can be put into a standby state. Setting the receiver wakeup bit, RWU, in SCC2 puts the
receiver into a standby state during which receiver interrupts are disabled.
MC68HC908GP32 Data Sheet, Rev. 10
142
Freescale Semiconductor