MC68HC908GP32_08 Datasheet, PDF (200/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Timer Interface Module (TIM)
17.4 Functional Description
Figure 17-1 shows the structure of the TIM. The central component of the TIM is the 16-bit TIM counter
that can operate as a free-running counter or a modulo up-counter. The TIM counter provides the timing
reference for the input capture and output compare functions. The TIM counter modulo registers,
TMODH:TMODL, control the modulo value of the TIM counter. Software can read the TIM counter value
at any time without affecting the counting sequence.
The two TIM channels (per timer) are programmable independently as input capture or output compare
channels. If a channel is configured as input capture, then an internal pullup device may be enabled for
that channel. (See 12.5.3 Port D Input Pullup Enable Register.)
INTERNAL
BUS CLOCK
TSTOP
TRST
PRESCALER
PRESCALER SELECT
PS2
PS1
PS0
16-BIT COUNTER
16-BIT COMPARATOR
TMODH:TMODL
CHANNEL 0
16-BIT COMPARATOR
TCH0H:TCH0L
16-BIT LATCH
CHANNEL 1
16-BIT COMPARATOR
TCH1H:TCH1L
16-BIT LATCH
ELS0B ELS0A
CH0F
MS0A
MS0B
ELS1B ELS1A
MS1A
CH1F
TOF
INTERRUPT
TOIE
LOGIC
TOV0
CH0MAX
CH0IE
TOV1
CH1MAX
CH1IE
PORT
LOGIC
T[1,2]CH0
INTERRUPT
LOGIC
PORT
LOGIC
T[1,2]CH1
INTERRUPT
LOGIC
Figure 17-1. TIM Block Diagram
Figure 17-2 summarizes the timer registers.
NOTE
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TSC may generically refer to both
T1SC and T2SC.
MC68HC908GP32 Data Sheet, Rev. 10
200
Freescale Semiconductor