MC68HC908GP32_08 Datasheet, PDF (55/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Interrupts
4.3.4 Conversion
In continuous conversion mode, the ADC data register will be filled with new data after each conversion.
Data from the previous conversion will be overwritten whether that data has been read or not.
Conversions will continue until the ADCO bit is cleared. The COCO bit is set after the first conversion and
will stay set until the next read of the ADC data register.
In single conversion mode, conversion begins with a write to the ADSCR. Only one conversion occurs
between writes to the ADSCR.
When a conversion is in process and the ADSCR is written, the current conversion data should be
discarded to prevent an incorrect reading.
4.3.5 Accuracy and Precision
The conversion process is monotonic and has no missing codes.
4.4 Interrupts
When the AIEN bit is set, the ADC module is capable of generating CPU interrupts after each ADC
conversion. A CPU interrupt is generated if the COCO bit is at logic 0. The COCO bit is not used as a
conversion complete flag when interrupts are enabled.
4.5 Low-Power Modes
The WAIT and STOP instruction can put the MCU in low power- consumption standby modes.
4.5.1 Wait Mode
The ADC continues normal operation during wait mode. Any enabled CPU interrupt request from the ADC
can bring the MCU out of wait mode. If the ADC is not required to bring the MCU out of wait mode, power
down the ADC by setting ADCH4–ADCH0 bits in the ADC status and control register before executing
the WAIT instruction.
4.5.2 Stop Mode
The ADC module is inactive after the execution of a STOP instruction. Any pending conversion is aborted.
ADC conversions resume when the MCU exits stop mode after an external interrupt. Allow one
conversion cycle to stabilize the analog circuitry.
4.6 I/O Signals
The ADC module has eight pins shared with port B, PTB7/AD7–PTB0/AD0.
4.6.1 ADC Analog Power Pin (V_DDAD)/ADC Voltage Reference High Pin (V_REFH)
The ADC analog portion uses V_DDAD as its power pin. Connect the V_DDAD pin to the same voltage
potential as V_DD. External filtering may be necessary to ensure clean V_DDAD for good results.
NOTE
For maximum noise immunity, route V_DDAD carefully and place bypass
capacitors as close as possible to the package.
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor
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