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MC68HC908GP32_08 Datasheet, PDF (57/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
I/O Registers
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH4–ADCH0 — ADC Channel Select Bits
ADCH4–ADCH0 form a 5-bit field which is used to select one of 16 ADC channels. Only eight
channels, AD7–AD0, are available on this MCU. The channels are detailed in Table 4-1. Care should
be taken when using a port pin as both an analog and digital input simultaneously to prevent switching
noise from corrupting the analog signal. (See Table 4-1.)
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
NOTE
Recovery from the disabled state requires one conversion cycle to stabilize.
The voltage levels supplied from internal reference nodes, as specified in Table 4-1, are used to verify
the operation of the ADC converter both in production test and for user applications.
Table 4-1. Mux Channel Select
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Input Select
0
0
0
0
0
PTB0/AD0
0
0
0
0
1
PTB1/AD1
0
0
0
1
0
PTB2/AD2
0
0
0
1
1
PTB3/AD3
0
0
1
0
0
PTB4/AD4
0
0
1
0
1
PTB5/AD5
0
0
1
1
0
PTB6/AD6
0
0
1
1
1
PTB7/AD7
0
1
0
0
0
↓
↓
↓
↓
↓
Reserved
1
1
1
0
0
1
1
1
0
1
VREFH
1
1
1
1
0
VREFL
1
1
1
1
1
ADC power off
NOTE: If any unused channels are selected, the resulting ADC conversion will be unknown
or reserved.
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor
57