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MC68HC908GP32_08 Datasheet, PDF (115/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Chapter 12
Input/Output (I/O) Ports
12.1 Introduction
Thirty-three (33) bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are programmable
as inputs or outputs. All individual bits within port A, port C, and port D are software configurable with
pullup devices if configured as input port bits. The pullup devices are automatically and dynamically
disabled when a port bit is switched to output mode.
Input pins and I/O port pins that are not used in the application must be terminated. This prevents excess
current caused by floating inputs, and enhances immunity during noise or transient events. Termination
methods include:
1. Configuring unused pins as outputs and driving high or low;
2. Configuring unused pins as inputs and enabling internal pull-ups;
3. Configuring unused pins as inputs and using external pull-up or pull-down resistors.
Never connect unused pins directly to VDD or VSS.
Since some general-purpose I/O pins are not available on all packages, these pins must be terminated
as well. Either method 1 or 2 above are appropriate.
Addr.
$0000
$0001
$0002
$0003
Register Name
Read:
Port A Data Register
(PTA)
Write:
Reset:
Read:
Port B Data Register
(PTB)
Write:
Reset:
Read:
Port C Data Register
(PTC)
Write:
Reset:
Read:
Port D Data Register
(PTD)
Write:
Reset:
Bit 7
PTA7
PTB7
0
PTD7
6
PTA6
5
PTA5
PTB6
PTB5
PTC6
PTC5
PTD6
PTD5
= Unimplemented
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
PTC4
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
2
PTA2
PTB2
PTC2
PTD2
1
PTA1
PTB1
PTC1
PTD1
Bit 0
PTA0
PTB0
PTC0
PTD0
Figure 12-1. I/O Port Register Summary
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor
115