MC68HC908GP32_08 Datasheet, PDF (33/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Input/Output (I/O) Section
Addr. Register Name
Bit 7
6
5
4
3
2
IRQ Status and Control ^{Read: 0}
0
0
0
IRQF
0
$001D
Register Write:
ACK
(INTSCR) _{Reset: 0}
0
0
0
0
0
Configuration Register 2 ^{Read: 0}
0
0
0
0
0
$001E
(CONFIG2)† Write:
Reset: 0
0
0
0
0
0
$001F
Read:
Configuration Register 1
(CONFIG1)^†
Write:
Reset:
COPRS
0
LVISTOP LVIRSTD LVIPWRD LVI5OR3^†
0
0
0
0
SSREC
0
Timer 1 Status and Control ^{Read: TOF}
TOIE TSTOP
0
0
PS2
$0020
Register Write: 0
TRST
(T1SC) _{Reset: 0}
0
1
0
0
0
$0021
Timer 1 Counter ^{Read: Bit 15}
14
13
12
11
10
Register High Write:
(T1CNTH) _{Reset: 0}
0
0
0
0
0
$0022
Timer 1 Counter ^{Read: Bit 7}
6
5
4
3
2
Register Low Write:
(T1CNTL) _{Reset: 0}
0
0
0
0
0
Timer 1 Counter Modulo ^Read: _{Bit 15}
14
13
12
11
10
$0023
Register High Write:
(T1MODH) _{Reset: 1}
1
1
1
1
1
Timer 1 Counter Modulo ^Read:
$0024
Register Low Write:
Bit 7
6
5
4
3
2
(T1MODL) Reset: 1
1
1
1
1
1
Read:
$0025
Timer 1 Channel 0 Status and
Control Register (T1SC0)
Write:
Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B
0
ELS0A
0
$0026
Timer 1 Channel 0 ^Read: _{Bit 15}
14
Register High Write:
(T1CH0H) _Reset:
13
12
11
10
Indeterminate after reset
Timer 1 Channel 0 ^Read: _{Bit 7}
6
5
4
3
2
$0027
Register Low Write:
(T1CH0L) _Reset:
Indeterminate after reset
† One-time writable register after each reset, except LVI5OR3 bit. LVI5OR3 bit is only reset via POR (power-on reset).
1
Bit 0
IMASK MODE
0
0
OSC-
STOPENB
SCIBDSRC
0
0
STOP COPD
0
0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
9
1
1
1
TOV0
0
9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
1
Bit 0
Read:
$0028
Timer 1 Channel 1 Status and
Control Register (T1SC1)
Write:
Reset:
$0029
Timer 1 Channel 1 ^Read:
Register High Write:
(T1CH1H) _Reset:
$002A
Timer 1 Channel 1 ^Read:
Register Low Write:
(T1CH1L) _Reset:
CH1F
0
0
Bit 15
Bit 7
0
CH1IE
0
0
14
13
6
5
= Unimplemented
MS1A ELS1B ELS1A TOV1
0
0
0
0
12
11
10
9
Indeterminate after reset
4
3
2
1
Indeterminate after reset
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 6)
CH1MAX
0
Bit 8
Bit 0
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor
33