MC68HC908GP32_08 Datasheet, PDF (54/266 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Analog-to-Digital Converter (ADC)
INTERNAL
DATA BUS
READ DDRBx
WRITE DDRBx
RESET
WRITE PTBx
READ PTBx
DDRBx
PTBx
DISABLE
PTBx
ADC CHANNEL x
DISABLE
ADC DATA REGISTER
CONVERSION
INTERRUPT ^COMPLETE
LOGIC
ADC
ADC
VOLTAGE IN
(V_ADIN) _CHANNEL
SELECT
ADCH4–ADCH0
AIEN COCO
CGMXCLK
BUS CLOCK
ADC CLOCK
CLOCK
GENERATOR
ADIV2–ADIV0 ADICLK
Figure 4-1. ADC Block Diagram
NOTE
Connect the V_DDAD pin to the same voltage potential as the V_DD pin, and
connect the V_SSAD pin to the same voltage potential as the V_SS pin.
The V_DDAD pin should be routed carefully for maximum noise immunity.
4.3.3 Conversion Time
Conversion starts after a write to the ADSCR. One conversion will take between 16 and 17 ADC clock
cycles. The ADIVx and ADICLK bits should be set to provide a 1-MHz ADC clock frequency.
Conversion time = ^{16 to 17 ADC cycles}
ADC frequency
Number of bus cycles = conversion time × bus frequency
MC68HC908GP32 Data Sheet, Rev. 10
54
Freescale Semiconductor