39K30 Datasheet, PDF (55/86 Pages) Cypress Semiconductor – CPLDs at FPGA DensitiesTM

Table 12. 388 BGA Pin Table (continued)
Pin
K25
K26
L1
L2
L3
L4
L11
L12
L13
L14
L15
L16
L23
L24
L25
L26
M1
M2^[19]
M3^[19]
M4
M11
M12
M13
M14
M15
M16
M23
M24
M25
M26
N1
N2
N3^[19]
N4^[19]
N11
N12
N13
N14
N15
N16
N23^[19]
N24
N25
N26
CY39050
NC
NC
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
NC
IO/V_REF5
NC
NC
IO0
IO0
IO0
V_CCIO0
GND
GND
GND
GND
GND
GND
V_CCIO5
NC
NC
NC
NC
IO/V_REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V_REF5
Document #: 38-03039 Rev. *H
CY39100
IO5
IO5
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
IO5
IO/V_REF5
IO5
IO5
IO0
IO0
IO0
V_CCIO0
GND
GND
GND
GND
GND
GND
V_CCIO5
IO5
IO5
IO5
VCC
IO/V_REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V_REF5
Delta39K™ ISR™
CPLD Family
CY39165
IO5
IO5
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
IO5
IO/V_REF5
IO5
IO5
IO0
IO0
IO0
V_CCIO0
GND
GND
GND
GND
GND
GND
V_CCIO5
IO5
IO5
IO5
VCC
IO/V_REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V_REF5
CY39200
IO5
IO5
IO0
IO0
IO0
IO0
GND
GND
GND
GND
GND
GND
IO5
IO/V_REF5
IO5
IO5
IO0
IO0
IO0
V_CCIO0
GND
GND
GND
GND
GND
GND
V_CCIO5
IO5
IO5
IO5
VCC
IO/V_REF0
IO0
IO1
GND
GND
GND
GND
GND
GND
IO5
IO5
IO5
IO/V_REF5
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