39K30 Datasheet, PDF (2/86 Pages) Cypress Semiconductor – CPLDs at FPGA DensitiesTM

Delta39K™ ISR™
CPLD Family
Delta39K Speed Bins^[3]
Device
V_CC
233
200
181
125
83
39K30
3.3/2.5V
X
X
X
39K50
3.3/2.5V
X
X
X
39K100
3.3/2.5V
X
X
X
39K165
3.3/2.5V
X
X
X
39K200
3.3/2.5V
X
X
X
Device Package Offering and I/O Count Including Dedicated Clock and Control Inputs
Self-Boot Solution^[4]
208 EQFP 256 FBGA 484-FBGA 256-FBGA
388-BGA
484-FBGA 676-FBGA
28 × 28 mm 17 × 17 mm 23 × 23 mm 17 × 17 mm 35 × 35 mm 23 × 23 mm 27 × 27 mm
Device 0.5-mm pitch 1.0-mm pitch 1.0-mm pitch 1.0-mm pitch 1.27-mm pitch 1.0-mm pitch 1.0-mm pitch
39K30
136
174
174
39K50
136
180
218
218
39K100
136
180
302
294
302
39K165
136
356
294
386
39K200
136
368
294
428
Notes:
3. Speed bins shown here are for commercial operating range. Please refer to Delta39K ordering information on industrial-range speed bins on page 38.
4. Self-boot solution integrates the boot PROM (flash memory) with Delta39K die inside the same package. This flash memory can endure at least 10,000
programming/erase cycles and can retain data for at least 100 years.
Document #: 38-03039 Rev. *H
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