39K30 Datasheet, PDF (16/86 Pages) Cypress Semiconductor – CPLDs at FPGA DensitiesTM

Delta39K™ ISR™
CPLD Family
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
(39K200, 208 EQFP) ................................. –45°C to +125°C
Storage Temperature
(all other densities and packages) .............. –65°C to +150°C
Soldering Temperature................................................. 220°C
Ambient Temperature with
Power Applied............................................... –40°C to +85°C
Operating Range
Junction Temperature...................................................135°C
V_CC to Ground Potential...................................–0.5V to 4.6V
V_CCIO to Ground Potential................................–0.5V to 4.6V
DC Voltage Applied to Outputs
in High-Z state ..................................................–0.5V to 4.5V
DC Input voltage...............................................–0.5V to 4.5V
DC Current into Outputs ........................................ ± 20 mA^[6]
Static Discharge Voltage
(per JEDEC EIA./JESD22–A114A)............................ >2001V
Latch-up Current ..................................................... >200 mA
Range
Commercial
Ambient
Temperature
0°C to +70°C
Industrial –40°C to +85°C
DC Characteristics
Junction
Temperature
0°C to +85°C
–40°C to +100°C
Output
Condition
3.3V
2.5V
1.8V
1.5V
3.3V
2.5V
1.8V
1.5V
V_CCIO
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
1.5V ± 0.1V^[5]
V_CC
3.3V ± 0.3V or
2.5V ± 0.2V
(39KV)
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
1.5V ± 0.1V^[5]
V_CCJTAG/
V_CCCNFG V_CCPLL V_CCPRG
Same as Same as 3.3V ±
V_CCIO
V_CC
0.3V
Parameter
Description
Test
Conditions
V_DRINT
Data Retention V_CC Voltage
(config data may be lost below this)
V_DRIO
I_IX[7]
I_OZ
I_OS[8]
I_BHL
I_BHH
I_BHLO
I_BHHO
I_CC0
Data Retention V_CCIO Voltage
(config data may be lost below this)
Input Leakage Current
GND ≤ V_I ≤ 3.6V
Output Leakage Current
GND ≤ V_O ≤
V_CCIO
Output Short Circuit Current
V_CCIO = Max.
V_OUT = 0.5V
Input Bus Hold LOW Sustaining Current V_CC = Min.
V_PIN = V_IL
Input Bus Hold HIGH Sustaining Current V_CC = Min.
V_PIN = V_IH
Input Bus Hold LOW Overdrive Current V_CC = Max.
Input Bus Hold HIGH Overdrive Current V_CC = Max.
Standby Current
39K30
39K50
39K100
39K165
39K200
V_CCIO = 3.3V V_CCIO = 2.5V V_CCIO = 1.8V
Min. Max. Min. Max. Min. Max.
1.5
1.5
1.5
Unit
V
1.2
1.2
1.2
V
–10 10 –10 10 –10
10
µA
–10 10 –10 10 –10
10
µA
–160
–160
–160
µA
+40
+30
+25
µA
–40
–30
–25
µA
+250
–250
All bins
20
20
30
60
60
+200
–200
All bins
20
20
30
60
60
+150
µA
–150
µA
–125 bin –83 bin _µA
3 12
3 12
5 20
10 40
10 40
Note:
6. DC current into outputs is 36 mA with HSTL III, 48 mA with HSTL IV, and 36 mA with GTL+ (with 25W pull-up resistor and V_TT = 1.5).
7. Input Leakage current is ±10µA for all the pins on all the Delta39K package except the following pins in Delta39K100 packages: The input leakage current spec
for these pins in ±200µA
Delta39K100
Package
Pins
388-BGA
B4, C2
484-FBGA
B8, G9
676-FBGA
F11, J11
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. V_OUT = 0.5V has been chosen to avoid test
problems caused by tester-ground degradation. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-03039 Rev. *H
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