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W641GG2JB Datasheet, PDF (95/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM
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W641GG2JB
1-Gbit GDDR3 Graphics SDRAM
7.4 Differential Clock DC and AC Levels
7.4.1 Differential Clock DC and AC Input conditions (0 °C ≤ Tc ≤ 105°C)
Parameter
Symbol
Limit Values
Unit
Min.
Max.
Clock Input Mid-Point Voltage, CLK and CLK#
Clock Input Voltage Level, CLK and CLK#
VMP(DC) 0.7 × VDDQ – 0.10 0.7 × VDDQ + 0.10 V
VIN(DC)
0.42
VDDQ + 0.3
V
Clock DC Input Differential Voltage, CLK and CLK# VID(DC)
0.3
VDDQ
V
Clock AC Input Differential Voltage, CLK and CLK# VID(AC)
0.5
VDDQ + 0.5
V
AC Differential Crossing Point Input Voltage
VIX(AC) 0.7 × VDDQ – 0.15 0.7 × VDDQ + 0.15 V
Notes :
1. All voltages referenced to VSS.
2. for 1.8 V VDD/VDDQ power supply.
3. VID is the magnitude of the difference between the input level on CLK and the input level on CLK#.
4. The value of VIX is expected to equal 0.7 × VDDQ of the transmitting device and must track variations in the DC level of the same.
Note
1
1,2
1
1,2,3
1,2,4
7.5 Output Test Conditions
VDDQ
60 ohm
DQ
DQS
Test point
- 95 -
Publication Release Date: Apr, 22, 2011
Revision A01-002
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