W641GG2JB Datasheet, PDF(19/109 Page) Winbond – 1-Gbit GDDR3 Graphics SDRAM

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W641GG2JB Datasheet, PDF (19/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

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W641GG2JB

1-Gbit GDDR3 Graphics SDRAM

6.1.2 Initialization in 1â CS mode

The GDDR3 GRAPHICS SDRAM must be powered up and initialized in a predefined manner. Operational procedures other than

those specified may result in undefined operation or permanent damage to the device.The following sequence is highly

recommended for Power-Up:

1. Apply power (VDD, VDDQ, VREF). Apply VDD before or at the same time as VDDQ, apply VDDQ before or at the same time as VREF.

Maintain RES = Low and CS0 = High to ensure that all the DQ outputs will be in HiZ state, all active terminations off and the DLL

off. All other pins may be undefined.

2. Maintain stable conditions for 200 Î¼s minimum for the GDDR3 to power up.

3. After clock is stable, set CKE to High or Low. After tATS minimum set RES to high. On the rising edge of RES, the CKE value is

latched to determine the address and command bus termination value. If CKE is sampled LOW the address termination value is

set to ZQ / 2. If CKE is sampled HIGH, the address and command bus termination is set to ZQ.

4. After tATH minimum, set CKE to high.

5. Wait a minimum of 700 cycles to calibrate and update the address and command termination impedances. Issue DESELECT on

the command bus during these 700 cycles.

6. Apply a PRECHARGE ALL command by holding CS0 low and wait for tRP to expire.

7. Issue an Extended Mode Register Set command to set the mode to 1-CS and activate the DLL. The mode selection will be done

using the bank address BA2 that will be set to low level for 1-CS mode (in Dual Rank Mode).

8. Issue an Mode Register Set command after tMRD is met to reset the DLL and define the operating parameters.

9. Wait 1000 cycles of clock input to lock the DLL. No Read command can be applied during this time. Since the impedance

calibration is already completed, the DLL mimic circuitry can use the actual programmed driver impedance value.

10. Issue a PRECHARGE ALL command to each of the programmed ranks or issue single bank precharge commands to each of the

8 banks to place the chip in an idle state.

11. Issue or more AUTO REFRESH commands.

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Publication Release Date: Apr, 22, 2011

Revision A01-002

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