W641GG2JB Datasheet, PDF (81/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

6.17.2 DTERDIS followed by DTERDIS
W641GG2JB
1-Gbit GDDR3 Graphics SDRAM
Notes :
1. At least 1NOP is required between 2 DTERDIS commands. This correspond to a Read to Read transition on the other memory in
a 2 memories system.
2. CAS Latency 7 is used as an example.
3. The DQ terminations are switched off (CL-1) clock periods after the DTERDIS command for a duration of 4 clocks.
4.The dashed lines (RDQS bus) describe the RDQS behavior in the case where the DTERDIS command corresponds
to a Read command applied to the second Graphics DRAM in a 2 memories system. In this case, RDQS would be
driven by the second Graphics DRAM.
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Publication Release Date: Apr, 22, 2011
Revision A01-002