W641GG2JB Datasheet, PDF (74/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

W641GG2JB
6.16.4 Bursts with Gaps
6.16.4.1 Consecutive Read Bursts with Gaps
0
1
2
3
6
CLK#
CLK
Com.
RD
N/D
N/D
RD
N/D
Addr.
B/Cx
B/Cy
CAS latency = 5
RDQS
DQ
CAS latency = 6
RDQS
1-Gbit GDDR3 Graphics SDRAM
7
8
9
10
11
12
N/D
N/D
N/D
N/D
N/D
N/D
Dx0 Dx1 Dx2 Dx3
Dy0 Dy1 Dy2 Dy3
DQ
Dx0 Dx1 Dx2 Dx3
Dy0 Dy1 Dy2
B / Cx: Bank / Column address x
B / Cy: Bank / Column address y
RD : READ
Dx# : Data from B / Cx
Dy# : Data from B / Cy
Com. : Command
Addr. : Address B / C
Don‘t care
DQs : Terminations off
RDQS : Not driven
Notes :
1. The second RD command may be either for the same bank or another bank.
2. RDQS will start driving high 1/2 cycle prior to the first falling edge and stop 1/2 cycle after the last rising edge of RDQS.
3. The DQ terminations are switched off 1 cycle before the first Read Data and on again 1 cycle after the last Read data.
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Publication Release Date: Apr, 22, 2011
Revision A01-002