W641GG2JB Datasheet, PDF (47/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

W641GG2JB
1-Gbit GDDR3 Graphics SDRAM
6.7.2.1 Extended Mode Register 1 (EMRS1)
BA2 BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Mode 0
1
RFU
Vendor
ID
ADD/CMD
Ternination
WR
DLL
Write
Recovery
Data
OCD
Termination Impedance
BA2
Chip Select
Mode
0
1-CS
1
2-CS
A10 Vendor ID
0 Off (*)
1
On
A6 DLL
0 On (*)
1
Off
A1
A0
OCD
Impedance
0 0 Autocal (*)
0 1 35 ohms
1 0 40 ohms
1 1 45 ohms
A9
A8
ADD/CMD
Ternination
00
ZQ/4
01
ZQ/2
1 0 ZQ/2 (*)
11
ZQ
(*) = Default value at power-up
A7
A5
A4
Write
Recovery
000
11
001
4
010
5
011
6
100
7
10 1
8
110
9
1 1 1 10 (*)
A3
A2
Data
Termination
0
0 disabled
0
1
RFU
1
0
ZQ/4
1
1 ZQ/2 (*)
Notes :
1. Default termination values at Power Up.
2. The ODT disable function disables all terminators on th device.
3. If the user activates bits in the extended mode register in an optional field, either the optional field is activated (if option
implemented in the device) or no action is taken by the device (if option not implemented).
4. WR (write recovery time for auto precharge) in clock cycles is calculated by dividing tWR (in ns) and rounding up to the next
integer (WR[cycles] = tWR[ns] / tCK[ns]). The mode register must be programmed to this value.
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Publication Release Date: Apr, 22, 2011
Revision A01-002