W641GG2JB Datasheet, PDF (64/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

W641GG2JB
6.15.4 Write followed by Read
1-Gbit GDDR3 Graphics SDRAM
0
CLK#
CLK
1
2
3
4
5
6
7
8
9
Com.
WR
N/D
DES
DES
DES
DES
DES
DES
RD
N/D
Addr.
B/C
B/C
WDQS
DQ
WL = 3
D0 D1 D2 D3
tWTR
Com.
WR
N/D
DES
DES
DES
DES
DES
DES
DES
RD
Addr.
B/C
B/C
WDQS
DQ
WL = 4
tWTR
D0 D1 D2 D3
D# : Data to B / C
Com. : Command
Addr. : Address B / C
WL : Write Latency
Don‘t care
B / C: Bank / Column address
WR : WRITE
RD : READ
DES : Deselect
N/D : NOP or DES
Notes :
1. Shown with nominal value of t_DQSS.
2. The RD command may be either for the same bank or another bank.
3. WDQS can only transition when data is applied at the chip input and during pre- and postambles.
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Publication Release Date: Apr, 22, 2011
Revision A01-002