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W641GG2JB Datasheet, PDF (55/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM
W641GG2JB
6.11.2 Bank Activation Timing
CLK#
CLK
Com. ACT
R/W
A0-A11 Row
Col
BA0,BA1 B.Y
B.Y
tRCD
tRAS
PRE
A8
B.Y
tRC
1-Gbit GDDR3 Graphics SDRAM
ACT
Row
B.Y
ACT
Row
B.X
tRRD
Row: Row Address
Col: Column Address
B.X: Bank X
B.Y: Bank Y
R/W: READ or WRITE command
PRE: PRECHARGE command
ACT: ACTIVATE command
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6.11.3 Bank Activation Timing on different rank in 2-CS mode
CLK#
CLK
Com. ACT
R/W
PRE
A0-A11 Row
Col
A8
BA0,BA1 B.Y
B.Y
tRCD
tRAS
B.Y
tRC
ACT_0
Row
B.Y
ACT_1
Row
B.X
tRRD_RR=1
Row: Row Address
Col: Column Address
B.X: Bank X
B.Y: Bank Y
R/W: READ or WRITE command
PRE: PRECHARGE command
ACT_0: ACTIVATE command Rank 0
ACT_1: ACTIVATE command Rank 1
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For eight bank GDDR3 devices, there may be a need to limit the number of activates in a rolling window to ensure that the
instantaneous current supplying capability of the devices is not exceeded. To reflect the true capability of the DRAM instantaneous
current supply, the parameter tFAW (four activate window) is defined. No more than 4 banks may be activated in a rolling tFAW
window. Converting to clocks is done by dividing tFAW (ns) by tCK (ns) and rounding up the next integer value. As an example of the
rolling window, if (tFAW / tCK) rounds up to 10 clocks, and an activate command is issued in clock n, no more than three further
activate commands may be issued in clocks n+1 through n+9. tFAW is only valid within one rank. There is no further restriction
between ranks.
6.11.4 Four Window Active tFAW
CLK#
CLK
CMD
ACT
ACT
ACT
ACT
tRRD
tRRD
tRRD
ACT
ACT
ACT
ACT
tRRD
tRRD
tRRD
tFAW
tFAW+3*tRRD
ACT:ACTIVATE command
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Publication Release Date: Apr, 22, 2011
Revision A01-002