W641GG2JB Datasheet, PDF (79/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

W641GG2JB
1-Gbit GDDR3 Graphics SDRAM
6.17 Data Termination Disable (DTERDIS)
The Data Temination Disable command is detected by the device by snooping the bus for Read commands when CS is high. The
terminators are disabled starting at CL - 1 clocks after the DTERDIS command is detected and the duration is 4 clocks. The
command and address terminators are always enabled.
DTERDIS may only be applied to the GDDR3 Graphics memory if it is not in the Power Down or in the Self Refresh state.
The timing relationship between DTERDIS and other commands is defined by the constraint to avoid contention on the RDQS bus
(i.e Read to DTERDIS transition) or the necessity to have a defined termination on the data bus during Write (i.e. Write to DTERDIS
transition). ACT and PRE/PREALL may be applied at any time before or after a DTERDIS command.
6.17.1 Data Terminal Disable Command
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Publication Release Date: Apr, 22, 2011
Revision A01-002