W641GG2JB Datasheet, PDF (77/109 Pages) Winbond – 1-Gbit GDDR3 Graphics SDRAM

6.16.7 Read followed by Write
W641GG2JB
1-Gbit GDDR3 Graphics SDRAM
Notes :
1. Shown with nominal t_AC, t_DQSQ and t_DQSS.
2. RDQS will start driving high 1/2 cycle prior to the first falling edge and stop 1/2 cycle after the last rising edge of RDQS.
3. The DQ terminations are switched off 1 cycle before the first Read Data and on again 1 cycle after the last Read data.
4. WDQS can only transition when data is applied at the chip input and during pre- and postambles.
5. The Write command may be either on the same bank or on another bank.
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Publication Release Date: Apr, 22, 2011
Revision A01-002