LM3S1651 Datasheet, PDF (998/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Register Quick Reference
31
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1
0
SRCR2, type R/W, offset 0x048, reset 0x00000000 (see page 281)
UDMA
Hibernation Module
Base 0x400F.C000
HIBRTCC, type RO, offset 0x000, reset 0x0000.0000 (see page 294)
HIBRTCM0, type R/W, offset 0x004, reset 0xFFFF.FFFF (see page 295)
HIBRTCM1, type R/W, offset 0x008, reset 0xFFFF.FFFF (see page 296)
HIBRTCLD, type R/W, offset 0x00C, reset 0xFFFF.FFFF (see page 297)
HIBCTL, type R/W, offset 0x010, reset 0x8000.0000 (see page 298)
WRC
HIBIM, type R/W, offset 0x014, reset 0x0000.0000 (see page 301)
GPIOJ GPIOH GPIOG GPIOF GPIOE GPIOD GPIOC GPIOB GPIOA
RTCC
RTCC
RTCM0
RTCM0
RTCM1
RTCM1
RTCLD
RTCLD
VDD3ON VABORT CLK32EN LOWBATEN PINWEN RTCWEN CLKSEL HIBREQ RTCEN
HIBRIS, type RO, offset 0x018, reset 0x0000.0000 (see page 303)
EXTW LOWBAT RTCALT1 RTCALT0
HIBMIS, type RO, offset 0x01C, reset 0x0000.0000 (see page 305)
EXTW LOWBAT RTCALT1 RTCALT0
HIBIC, type R/W1C, offset 0x020, reset 0x0000.0000 (see page 307)
EXTW LOWBAT RTCALT1 RTCALT0
HIBRTCT, type R/W, offset 0x024, reset 0x0000.7FFF (see page 308)
EXTW LOWBAT RTCALT1 RTCALT0
HIBDATA, type R/W, offset 0x030-0x12C, reset - (see page 309)
Internal Memory
Flash Memory Registers (Flash Control Offset)
Base 0x400F.D000
FMA, type R/W, offset 0x000, reset 0x0000.0000
FMD, type R/W, offset 0x004, reset 0x0000.0000
FMC, type R/W, offset 0x008, reset 0x0000.0000
TRIM
RTD
RTD
OFFSET
DATA
DATA
WRKEY
OFFSET
COMT MERASE ERASE WRITE
998
January 21, 2012
Texas Instruments-Production Data