LM3S1651 Datasheet, PDF (1018/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Register Quick Reference
31
30
29
28
27
26
25
24
23
22
15
14
13
12
11
10
9
8
7
6
PWM1CMPB, type R/W, offset 0x09C, reset 0x0000.0000 (see page 858)
PWM2CMPB, type R/W, offset 0x0DC, reset 0x0000.0000 (see page 858)
COMPB
PWM0GENA, type R/W, offset 0x060, reset 0x0000.0000 (see page 859)
COMPB
ACTCMPBD
ACTCMPBU
PWM1GENA, type R/W, offset 0x0A0, reset 0x0000.0000 (see page 859)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM2GENA, type R/W, offset 0x0E0, reset 0x0000.0000 (see page 859)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM0GENB, type R/W, offset 0x064, reset 0x0000.0000 (see page 862)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM1GENB, type R/W, offset 0x0A4, reset 0x0000.0000 (see page 862)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM2GENB, type R/W, offset 0x0E4, reset 0x0000.0000 (see page 862)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM0DBCTL, type R/W, offset 0x068, reset 0x0000.0000 (see page 865)
ACTCMPAD
21
20
5
4
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
PWM1DBCTL, type R/W, offset 0x0A8, reset 0x0000.0000 (see page 865)
PWM2DBCTL, type R/W, offset 0x0E8, reset 0x0000.0000 (see page 865)
PWM0DBRISE, type R/W, offset 0x06C, reset 0x0000.0000 (see page 866)
PWM1DBRISE, type R/W, offset 0x0AC, reset 0x0000.0000 (see page 866)
PWM2DBRISE, type R/W, offset 0x0EC, reset 0x0000.0000 (see page 866)
PWM0DBFALL, type R/W, offset 0x070, reset 0x0000.0000 (see page 867)
PWM1DBFALL, type R/W, offset 0x0B0, reset 0x0000.0000 (see page 867)
PWM2DBFALL, type R/W, offset 0x0F0, reset 0x0000.0000 (see page 867)
RISEDELAY
RISEDELAY
RISEDELAY
FALLDELAY
FALLDELAY
FALLDELAY
19
18
3
2
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
17
16
1
0
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ENABLE
ENABLE
ENABLE
1018
Texas Instruments-Production Data
January 21, 2012