LM3S1651 Datasheet, PDF (462/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

General-Purpose Timers
10.1
Block Diagram
In the block diagram, the specific Capture Compare PWM (CCP) pins available depend on the
Stellaris device. See Table 10-1 on page 462 for the available CCP pins and their timer assignments.
Figure 10-1. GPTM Module Block Diagram
Timer A
Free-Running
Value
Interrupt / Config
Timer A
Interrupt
Timer B
Interrupt
GPTMCFG
GPTMCTL
GPTMIMR
GPTMRIS
GPTMMIS
GPTMICR
Timer B
Free-Running
Value
System
Clock
Timer A Control
GPTMTAPMR
GPTMTAPR
GPTMTAMATCHR
GPTMTAILR
GPTMTAMR
Timer B Control
GPTMTBMR
GPTMTBILR
GPTMTBMATCHR
GPTMTBPR
GPTMTBPMR
0x0000 (Down Counter Modes)
0xFFFF (Up Counter Modes)
TA Comparator
GPTMTAR En
GPTMTAV
GPTMTBV
GPTMTBR En
TB Comparator
Clock / Edge
Detect
32 KHz or
Even CCP Pin
RTC Divider
Clock / Edge
Detect
Odd CCP Pin
0x0000 (Down Counter Modes)
0xFFFF (Up Counter Modes)
10.2
Table 10-1. Available CCP Pins
Timer
Timer 0
Timer 1
Timer 2
Timer 3
16-Bit Up/Down Counter
TimerA
TimerB
TimerA
TimerB
TimerA
TimerB
TimerA
TimerB
Even CCP Pin
CCP0
-
CCP2
-
CCP4
-
CCP6
-
Odd CCP Pin
-
CCP1
-
CCP3
-
CCP5
-
CCP7
Signal Description
The following table lists the external signals of the GP Timer module and describes the function of
each. The GP Timer signals are alternate functions for some GPIO signals and default to be GPIO
signals at reset. The column in the table below titled "Pin Mux/Pin Assignment" lists the possible
GPIO pin placements for these GP Timer signals. The AFSEL bit in the GPIO Alternate Function
Select (GPIOAFSEL) register (page 429) should be set to choose the GP Timer function. The number
in parentheses is the encoding that must be programmed into the PMCn field in the GPIO Port
462
January 21, 2012
Texas Instruments-Production Data