LM3S1651 Datasheet, PDF (7/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1651 Microcontroller
12.3.3 Hardware Sample Averaging Circuit ............................................................................. 540
12.3.4 Analog-to-Digital Converter .......................................................................................... 541
12.3.5 Differential Sampling ................................................................................................... 544
12.3.6 Internal Temperature Sensor ........................................................................................ 547
12.3.7 Digital Comparator Unit ............................................................................................... 547
12.4 Initialization and Configuration ..................................................................................... 552
12.4.1 Module Initialization ..................................................................................................... 552
12.4.2 Sample Sequencer Configuration ................................................................................. 553
12.5 Register Map .............................................................................................................. 553
12.6 Register Descriptions .................................................................................................. 555
13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 613
13.1 Block Diagram ............................................................................................................ 614
13.2 Signal Description ....................................................................................................... 614
13.3 Functional Description ................................................................................................. 616
13.3.1 Transmit/Receive Logic ............................................................................................... 616
13.3.2 Baud-Rate Generation ................................................................................................. 617
13.3.3 Data Transmission ...................................................................................................... 618
13.3.4 Serial IR (SIR) ............................................................................................................. 618
13.3.5 ISO 7816 Support ....................................................................................................... 619
13.3.6 Modem Handshake Support ......................................................................................... 619
13.3.7 LIN Support ................................................................................................................ 621
13.3.8 FIFO Operation ........................................................................................................... 622
13.3.9 Interrupts .................................................................................................................... 623
13.3.10 Loopback Operation .................................................................................................... 624
13.3.11 DMA Operation ........................................................................................................... 624
13.4 Initialization and Configuration ..................................................................................... 624
13.5 Register Map .............................................................................................................. 625
13.6 Register Descriptions .................................................................................................. 627
14 Synchronous Serial Interface (SSI) .................................................................... 677
14.1 Block Diagram ............................................................................................................ 678
14.2 Signal Description ....................................................................................................... 678
14.3 Functional Description ................................................................................................. 679
14.3.1 Bit Rate Generation ..................................................................................................... 680
14.3.2 FIFO Operation ........................................................................................................... 680
14.3.3 Interrupts .................................................................................................................... 680
14.3.4 Frame Formats ........................................................................................................... 681
14.3.5 DMA Operation ........................................................................................................... 688
14.4 Initialization and Configuration ..................................................................................... 689
14.5 Register Map .............................................................................................................. 690
14.6 Register Descriptions .................................................................................................. 691
15 Inter-Integrated Circuit (I²C) Interface ................................................................ 719
15.1 Block Diagram ............................................................................................................ 720
15.2 Signal Description ....................................................................................................... 720
15.3 Functional Description ................................................................................................. 721
15.3.1 I²C Bus Functional Overview ........................................................................................ 721
15.3.2 Available Speed Modes ............................................................................................... 723
15.3.3 Interrupts .................................................................................................................... 724
15.3.4 Loopback Operation .................................................................................................... 725
January 21, 2012
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