LM3S1651 Datasheet, PDF (938/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Signal Tables
Table 21-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PB4
I/O
TTL
GPIO port B bit 4.
AIN10
I
Analog Analog-to-digital converter input 10.
C0-
I
Analog Analog comparator 0 negative input.
A6
IDX0
U1Rx
I
TTL
QEI module 0 index.
I
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
U2Rx
I
TTL
UART module 2 receive. When in IrDA mode, this signal has IrDA
modulation.
PB6
I/O
TTL
GPIO port B bit 6.
C0+
I
Analog Analog comparator 0 positive input.
C0o
O
TTL
Analog comparator 0 output.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
CCP7
I/O
TTL
Capture/Compare/PWM 7.
A7
Fault1
I
TTL
PWM Fault 1.
I2S0TXSCK
I/O
TTL
I²S module 0 transmit clock.
IDX0
I
TTL
QEI module 0 index.
VREFA
I
Analog This input provides a reference voltage used to specify the input
voltage at which the ADC converts to a maximum value. In other
words, the voltage that is applied to VREFA is the voltage with which
an AINn signal is converted to 1023. The VREFA input is limited
to the range specified in Table 23-22 on page 983 .
PB7
I/O
TTL
GPIO port B bit 7.
A8
NMI
I
TTL
Non-maskable interrupt.
PC0
I/O
TTL
GPIO port C bit 0.
A9
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
PC3
I/O
TTL
GPIO port C bit 3.
A10
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PB2
I/O
TTL
GPIO port B bit 2.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
A11
CCP3
I/O
TTL
Capture/Compare/PWM 3.
I2C0SCL
I/O
OD
I²C module 0 clock.
IDX0
I
TTL
QEI module 0 index.
PE1
I/O
TTL
GPIO port E bit 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
CCP6
A12
Fault0
I/O
TTL
Capture/Compare/PWM 6.
I
TTL
PWM Fault 0.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
SSI1Fss
I/O
TTL
SSI module 1 frame.
938
January 21, 2012
Texas Instruments-Production Data