LM3S1651 Datasheet, PDF (3/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1651 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 28
About This Document .................................................................................................................... 36
Audience .............................................................................................................................................. 36
About This Manual ................................................................................................................................ 36
Related Documents ............................................................................................................................... 36
Documentation Conventions .................................................................................................................. 37
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.4
Architectural Overview .......................................................................................... 39
Overview ...................................................................................................................... 39
Target Applications ........................................................................................................ 41
Features ....................................................................................................................... 41
ARM Cortex-M3 Processor Core .................................................................................... 41
On-Chip Memory ........................................................................................................... 43
Serial Communications Peripherals ................................................................................ 44
System Integration ........................................................................................................ 48
Advanced Motion Control ............................................................................................... 54
Analog .......................................................................................................................... 56
JTAG and ARM Serial Wire Debug ................................................................................ 57
Packaging and Temperature .......................................................................................... 58
Hardware Details .......................................................................................................... 58
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 59
Block Diagram .............................................................................................................. 60
Overview ...................................................................................................................... 61
System-Level Interface .................................................................................................. 61
Integrated Configurable Debug ...................................................................................... 61
Trace Port Interface Unit (TPIU) ..................................................................................... 62
Cortex-M3 System Component Details ........................................................................... 62
Programming Model ...................................................................................................... 63
Processor Mode and Privilege Levels for Software Execution ........................................... 63
Stacks .......................................................................................................................... 63
Register Map ................................................................................................................ 64
Register Descriptions .................................................................................................... 65
Exceptions and Interrupts .............................................................................................. 78
Data Types ................................................................................................................... 78
Memory Model .............................................................................................................. 78
Memory Regions, Types and Attributes ........................................................................... 80
Memory System Ordering of Memory Accesses .............................................................. 80
Behavior of Memory Accesses ....................................................................................... 81
Software Ordering of Memory Accesses ......................................................................... 81
Bit-Banding ................................................................................................................... 83
Data Storage ................................................................................................................ 85
Synchronization Primitives ............................................................................................. 85
Exception Model ........................................................................................................... 86
Exception States ........................................................................................................... 87
Exception Types ............................................................................................................ 87
Exception Handlers ....................................................................................................... 90
January 21, 2012
3
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