LM3S1651 Datasheet, PDF (940/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Signal Tables
Table 21-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PC2
I/O
TTL
GPIO port C bit 2.
B8
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
B9
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
PH4
B10
SSI1Clk
I/O
TTL
GPIO port H bit 4.
I/O
TTL
SSI module 1 clock.
PE0
I/O
TTL
GPIO port E bit 0.
CCP3
B11
PWM4
I/O
TTL
Capture/Compare/PWM 3.
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
SSI1Clk
I/O
TTL
SSI module 1 clock.
B12
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
C1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
C2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
VDDC
C3
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 23-6 on page 976.
C4
GND
-
Power Ground reference for logic and I/O pins.
C5
GND
-
Power Ground reference for logic and I/O pins.
PD5
I/O
TTL
GPIO port D bit 5.
AIN6
I
Analog Analog-to-digital converter input 6.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
C6
CCP4
I/O
TTL
Capture/Compare/PWM 4.
I2S0RXMCLK
I/O
TTL
I²S module 0 receive master clock.
U2Rx
I
TTL
UART module 2 receive. When in IrDA mode, this signal has IrDA
modulation.
VDDA
C7
-
Power The positive supply for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from VDD to minimize
the electrical noise contained on VDD from affecting the analog
functions. VDDA pins must be supplied with a voltage that meets
the specification in Table 23-2 on page 971, regardless of system
implementation.
PH1
I/O
TTL
GPIO port H bit 1.
CCP7
I/O
TTL
Capture/Compare/PWM 7.
C8
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
PH0
I/O
TTL
GPIO port H bit 0.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
C9
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
940
January 21, 2012
Texas Instruments-Production Data