LM3S1651 Datasheet, PDF (27/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1651 Microcontroller
Register 60:
Register 61:
Register 62:
Register 63:
Register 64:
Register 65:
Register 66:
Register 67:
Register 68:
Register 69:
PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800 ............................................ 874
PWM1 Fault Pin Logic Sense (PWM1FLTSEN), offset 0x880 ............................................ 874
PWM2 Fault Pin Logic Sense (PWM2FLTSEN), offset 0x900 ............................................ 874
PWM3 Fault Pin Logic Sense (PWM3FLTSEN), offset 0x980 ............................................ 874
PWM0 Fault Status 0 (PWM0FLTSTAT0), offset 0x804 .................................................... 875
PWM1 Fault Status 0 (PWM1FLTSTAT0), offset 0x884 .................................................... 875
PWM2 Fault Status 0 (PWM2FLTSTAT0), offset 0x904 .................................................... 875
PWM0 Fault Status 1 (PWM0FLTSTAT1), offset 0x808 .................................................... 877
PWM1 Fault Status 1 (PWM1FLTSTAT1), offset 0x888 .................................................... 877
PWM2 Fault Status 1 (PWM2FLTSTAT1), offset 0x908 .................................................... 877
Quadrature Encoder Interface (QEI) .......................................................................................... 880
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 887
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 890
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 891
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 892
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 893
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 894
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 895
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 896
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 897
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 899
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ..................................................... 901
January 21, 2012
27
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